Architected the electrical schematics and simulate the circuit for digital timer in Proteus to perform the functionality testing prior building the system.

Employed JK flip flop (IC 74LS47), BCD counter, 7-segment display and Function generator.

 The design of 4 bit Binary counter, one-digit BCD counter and two-digit BCD counter using JK flip flop allowed us to implement the knowledge of sequential circuit, truth tables, gates and all the IC’s learnt by using the proteus software and making it on a breadboard.